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billy1123
billy1123
25.06.2020 • 
Engineering

Implement the 4-bit adder/subtractor for integers with sign and overflow detection. Control input M defines the operating mode (addition A + B with M = 0, subtraction A - B with M- = 1). Negative arguments are presented as 2’s complements. The subtraction is performed addition of a 1’s complement of B and incrementing the result with carry-in C0 =1. The circuit has 10 inputs: A(3:0), B(3:0), carry-in to LSB C0, mode control M and 6 outputs: S(3:0) for sum, C4 for carry-out of MSB, and OFL for indication of overflow for singed integers. OFL =1 if overflow occurs, otherwise OFL = 0.Show the schematic using a 4-bit adder for unsigned integers as a building block and any logic gates. C3 is available. The overflow can be detected using carry in and carry out of sign bit (C3 and C4).Bonus (double number of points for Hw6).Suppose C3 of the 4 bit adder block can not be accessed. Implement OFL for signed integers for the adder/subtractor using sign bits of data and sum (A3, B3, S3) Show the schematic for OFL with any number of multiplexers and logic gates.

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